module ids
(
    input   wire    [10:00]     ids_alu_op_i,
    input   wire    [63:00]     ids_pc_i,
    input   wire    [63:00]     ids_imm_i,
    input   wire                ids_operand1_sel_i,
    input   wire                ids_operand2_sel_i,
    input   wire                ids_rs1_bypassdata_sel_i     ,
    input   wire                ids_rs2_bypassdata_sel_i     ,
    input   wire                ids_csr_bypassdata_sel_i     ,
    input   wire                ids_rs1_bypassdata_ex_sel_i  ,
    input   wire                ids_rs1_bypassdata_mem_sel_i ,
    input   wire                ids_rs1_bypassdata_wb_sel_i  ,
    input   wire                ids_rs2_bypassdata_ex_sel_i  ,
    input   wire                ids_rs2_bypassdata_mem_sel_i ,
    input   wire                ids_rs2_bypassdata_wb_sel_i  ,
    input   wire                ids_csr_bypassdata_ex_sel_i  ,
    input   wire                ids_csr_bypassdata_mem_sel_i ,
    input   wire                ids_csr_bypassdata_wb_sel_i  ,
    //	csr output
	input	wire	[63:00]		ids_csr_output_i,
    //  gpr,csr bypassdata
    input   wire    [63:00]     ids_gpr_output1_i,
    input   wire    [63:00]     ids_gpr_output2_i,
    input   wire    [63:00]     ids_gpr_bypassdata_ex_i,
    input   wire    [63:00]     ids_gpr_bypassdata_mem_i,
    input   wire    [63:00]     ids_gpr_bypassdata_wb_i,
    input   wire    [63:00]     ids_csr_bypassdata_ex_i,
    input   wire    [63:00]     ids_csr_bypassdata_mem_i,
    input   wire    [63:00]     ids_csr_bypassdata_wb_i,
    //  提前的移位
    input   wire    [01:00]     ids_alu_shift_mode_i,
    
    //  进入执行单元的操作数
    output  wire    [63:00]     ids_operand1_o,
    output  wire    [63:00]     ids_operand2_o,
    //  解决了数据相关的GPR和CSR数据
    output  wire    [63:00]     ids_rs1_data_o,
    output  wire    [63:00]     ids_rs2_data_o,
	output  wire    [63:00]     ids_csr_data_o,
    //  两级流水线加法
    output  wire    [32:00]     ids_add_res_l_o  ,
    output  wire    [31:00]     ids_add_res_h_o  ,
    output  wire    [32:00]     ids_sub_res_l_o  ,   
    output  wire    [31:00]     ids_sub_res_h_o  ,
    output  wire                ids_subu_res_l_o ,
    output  wire    [31:00]     ids_subu_res_h_o ,
    //
    output  wire    [63:00]     ids_shift2_o
);

    //
    wire    [63:00]     rs1_bypassdata;
    wire    [63:00]     rs2_bypassdata;
    wire    [63:00]     csr_bypassdata;
    //
    wire    [63:00]     shift2;
    bypassdataMux                                           bypassdataMux
    (
        .rs1_bypassdata_ex_sel                              (ids_rs1_bypassdata_ex_sel_i),
        .rs1_bypassdata_wb_sel                              (ids_rs1_bypassdata_wb_sel_i),
        .rs1_bypassdata_mem_sel                             (ids_rs1_bypassdata_mem_sel_i),
	    .rs2_bypassdata_ex_sel                              (ids_rs2_bypassdata_ex_sel_i),
        .rs2_bypassdata_mem_sel                             (ids_rs2_bypassdata_mem_sel_i),	
	    .rs2_bypassdata_wb_sel                              (ids_rs2_bypassdata_wb_sel_i),
        .csr_bypassdata_ex_sel                              (ids_csr_bypassdata_ex_sel_i),
        .csr_bypassdata_mem_sel                             (ids_csr_bypassdata_mem_sel_i),
        .csr_bypassdata_wb_sel                              (ids_csr_bypassdata_wb_sel_i),
	    .gpr_bypassdata_ex                                  (ids_gpr_bypassdata_ex_i  ),
        .gpr_bypassdata_mem                                 (ids_gpr_bypassdata_mem_i ),	
	    .gpr_bypassdata_wb                                  (ids_gpr_bypassdata_wb_i  ),
        .csr_bypassdata_ex                                  (ids_csr_bypassdata_ex_i  ),
        .csr_bypassdata_mem                                 (ids_csr_bypassdata_mem_i ),	
	    .csr_bypassdata_wb                                  (ids_csr_bypassdata_wb_i  ),
        .rs1_bypassdata                                     (rs1_bypassdata         ),
        .rs2_bypassdata                                     (rs2_bypassdata         ),
        .csr_bypassdata                                     (csr_bypassdata         )
    );
    assign  ids_rs1_data_o  =   ids_rs1_bypassdata_sel_i  ?   rs1_bypassdata  : ids_gpr_output1_i;
    assign  ids_rs2_data_o  =   ids_rs2_bypassdata_sel_i  ?   rs2_bypassdata  : ids_gpr_output2_i;
    assign  ids_csr_data_o  =   ids_csr_bypassdata_sel_i  ?   csr_bypassdata  : ids_csr_output_i; 
    operandMux                                              operandMux
    (
        .pc                                                 (ids_pc_i),
        .gpr_data1                                          (ids_rs1_data_o),
	    .operand1_sel                                       (ids_operand1_sel_i),
        .imm                                                (ids_imm_i),
	    .gpr_data2                                          (ids_rs2_data_o     ), 
	    .operand2_sel                                       (ids_operand2_sel_i ),
	    .operand1                                           (ids_operand1_o     ),
	    .operand2                                           (ids_operand2_o     )
    );
    barrelShifterF                                          barrelShifterF
    (
		.data_in				                            (ids_operand1_o),
		.op						                            (ids_alu_shift_mode_i),
		.shamt					                            (ids_operand2_o[05:00]),
		.data_out				                            (shift2)
    );
    assign  ids_add_res_l_o         =   {33{ids_alu_op_i[00] | ids_alu_op_i[08]}} 
                                        & 
                                        (ids_operand1_o[31:00] + ids_operand2_o[31:00]);

    assign  ids_add_res_h_o         =   {32{ids_alu_op_i[00] | ids_alu_op_i[08]}} 
                                        & 
                                        (ids_operand1_o[63:32] + ids_operand2_o[63:32]);

    assign  ids_sub_res_l_o         =   {33{ids_alu_op_i[01] | ids_alu_op_i[02] | ids_alu_op_i[09]}} 
                                        & 
                                        (ids_operand1_o[31:00] - ids_operand2_o[31:00]);

    assign  ids_sub_res_h_o         =   {32{ids_alu_op_i[01] | ids_alu_op_i[02] | ids_alu_op_i[09]}} 
                                        & 
                                        (ids_operand1_o[63:32] - ids_operand2_o[63:32]);
    //---------------------------------------------------------------------------------------------------
    wire    [32:00]     subu_res_l;
    assign  subu_res_l              =   {33{ids_alu_op_i[03]}} 
                                        & 
                                        (ids_operand1_o[31:00] - ids_operand2_o[31:00]);
    assign  ids_subu_res_l_o        =   subu_res_l[32];
    //---------------------------------------------------------------------------------------------------
    
    assign  ids_subu_res_h_o        =   {32{ids_alu_op_i[03]}} 
                                        & 
                                        (ids_operand1_o[63:32] - ids_operand2_o[63:32]);

    assign  ids_shift2_o            =   {64{ids_alu_op_i[07] | ids_alu_op_i[10]}} 
                                        & 
                                        shift2;
endmodule
    